Bibcode
Rodriguez-Ramos, L. F.; Rodriguez-Mora, A.; Sosa, N.; Diaz, J. J.; Joven, E.
Referencia bibliográfica
In: Surveillance technologies II; Proceedings of the Meeting, Orlando, FL, Apr. 21-23, 1992 (A93-29980 11-19), p. 56-64.
Fecha de publicación:
8
1992
Número de citas
0
Número de citas referidas
0
Descripción
Hardware design based on 20 MHz transputers, 120 ns first-in, first-out
(FIFO) memory, and a 20 MHz counter is discussed. The two transputers
are used to generate the states and to write them into the FIFO memory.
The data generated by the transputers is written in the FIFO memory in
parallel. The system design is characterized by a minimal state of 100
ns, a resolution of 33.3 ns, and fast data rate generation.